1. Field of the Invention
The invention relates to a method for operating a semiconductor memory apparatus and to a semiconductor memory system.
2. Description of the Related Art
For the operation of semiconductor memory apparatuses, a predetermined latency is provided between the application of a write or read instruction and the actual transmission of the data bits. The latency indicates how many clock cycles after the application of the write or read instruction the actual transmission of the data bits takes place. The latency indicates the period of time (i.e. the number of clock cycles) between application of the command (write or read) and the transmission of the first data bit. In addition, a predetermined preamble is provided, which indicates how many clock cycles elapse between the first edge of a data clock signal and the first transmitted bit of the data signal.